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LeCroy Voyager USB 3.0 Protocol Verification SystemThe LeCroy Voyager M3 is a 6th generation USB protocol verification platform designed for the next evolution of universal serial bus known as SuperSpeed USB. Leveraging LeCroy's extensive expertise in high-speed serial data analysis, the Voyager provides 100% accurate protocol capture of both USB 2.0 and 3.0 at data rates up to 5 Gb/s. The LeCroy Voyager M3 is a multifunction validation platform for USB 2.0 and 3.0 protocol testing. It's available with an integrated exerciser option capable of both 2.0 and 3.0 host and device emulation. Designed to reduce time-to-market for USB products, the LeCroy Voyager transparently monitors traffic, identifies link layer problems and helps verify compliance with the USB specifications. Loaded with innovative features that anticipate the needs of early adopters, the LeCroy Voyager platform is the intelligent choice for "cradle-to-grave" USB validation.
Unmatched Accuracy
The LeCroy Voyager analyzer front-end leverages custom circuitry from LeCroy's 5Gb/s PCI Express analyzer to provide fast-locking and uncompromised accuracy for USB 3.0 recording. SuperSpeed USB will implement hardware based power management with devices frequently entering power suspend mode. While in-line, the LeCroy Voyager system will detect and seamlessly recover from electrical idle while accurately showing all bus and power state transitions time-stamped within the display. It includes full support for spread spectrum clocking (SSC) and data scrambling (LFSR) which can be enabled / disabled for silicon bring-up testing.Flexible hardware
The front end of the LeCroy Voyager analyzer features native 3.0 connectors that bifurcate USB 2.0 and 3.0 electrical signals to provide loss-less capture of traffic from both links simultaneously. Concurrent high-speed and SuperSpeed recording allows end-to-end viewing of data transfers across a USB 3.0 hub. The system can operate as a USB 2.0/3.0 analyzer; and is also available in a 2.0-only configuration that is upgradeable to 3.0.
The LeCroy Voyager M3 platform includes 4GB of recording memory plus USB and Gbe links for uploading recorded traffic to the host PC. Fast access to captured traffic is now possible thanks to sustained data transfers of 600Mbit per second over the Gbe link. Both the analyzer and exerciser can utilize slow clocking (fractional) or external clock sources (as low as 1Mhz) for testing with FPGA-based prototypes or emulators that require ultra low-speed data acquisition.
The heart of the LeCroy Voyager verification system is LeCroy's revolutionary BusEngine™ technology. This state-of-the-art protocol processing core incorporates a real-time recording engine and configurable tools to selectively monitor and record SuperSpeed USB traffic. Field upgradeable firmware allows the BusEngine to evolve and support new features or future changes to the USB specification.
Additional innovations include upgradeable hardware components. The USB connectors on the analyzer are mounted on a removable daughter-card allowing the system to be upgraded as improved connectors are available. The analyzer and exerciser also include SMA differential Input/Output lines as an alternate interface for taping between early development boards. This eliminates dependencies on USB 3.0 connectors allowing testing to begin as soon as PHY silicon is available.
6th Generation Analysis Software
The LeCroy Voyager utilizes the legendary CATC Trace which has become the industry's de facto standard for USB 2.0 protocol analysis. The trace viewer software uses colors and patterns to train the eye to understand information faster. When recording mixed traffic upstream from a SuperSpeed hub, Legacy 2.0 and 3.0 packets are labeled and interleaved in a single display. Each event is shown on a separate row with every field labeled and color coded.. Traffic from the logical 2.0 & 3.0 channels can be individually filtered, searched or exported from the trace. The USB Transfer level can be expanded and collapsed to show the packet layer including all link management packets (LMPs) and flow control symbols.Integrated Exerciser Option
The LeCroy Voyager is available with an integrated exerciser option. It can simultaneously record and transmit SuperSpeed packets with low-level control of headers, payloads, and packet timing. Sophisticated, multi-stage traffic generation scripts can be developed using boolean expressions including IF-THEN logical branching and compound WAIT states. In addition to allowing low-level error injection and compliance verification, the exerciser provides early adopters with a USB 3.0 link to begin bring-up testing well before commercial hosts are available.
Raw Debugging Power
The LeCroy Voyager includes a special Link Tracker mode that captures every transition and presents raw 10-bit data patterns chronologically with timing resolution of 2ns. Designed to assist with low-level debugging, all ordered sets including training sequences and inter-packet symbols can be displayed in raw 10-bit, 8-bit, scrambled, and unscrambled Hex format. Symbol-to-symbol timing measurements are possible with a single click.
Key Features
Intelligent Triggering
The LeCroy Voyager provides hardware triggering to pinpoint protocol events of interest. Trigger events can be specified at the lowest levels including bus states and ordered sets (Link up, SKP, etc…) or header fields including route strings or packet types (ACK, EPRDY, etc….). LeCroy Voyager's graphical drag-and-drop interface makes setup easy. Users can define trigger logic that monitors multiple sequential events with counters and timers incorporated within each state. Real time error triggering is also available to detect 20 common error conditions.
Real Time Filtering
SuperSpeed data transfers at 5 Gb/s can fill memory buffers in an instant making event filtering critical for efficient debug. The LeCroy Voyager analyzer can filter unwanted traffic from the buffer in real-time by discarding redundant patterns such as SKPs, idles, and training sequences. Filtering logic can also include transaction layer packets with added criteria like direction or port number.Error Detection
The LeCroy Voyager can detect and flag over 40 Link & Protocol errors including logical link and timing errors. At the lower layers, training sequences and link commands are automatically verified for proper formatting. The Spec View displays header fields in hex or binary and also marks errors in red.
USB Device Decoding
The LeCroy Voyager software performs full decoding of USB device class traffic. It also supports vendor specific decoding for developers interested in automatically showing proprietary commands in the trace view. The LeCroy Voyager offers full support for the USB OTG specification. The analyzer identifies both the HNP(Host Negotiation Protocol) and SRP (Session Request Protocol) occurrences. VBus and Data Line pulses are captured, displayed and integrated in the trace file to provide a complete, end-to-end look at OTG occurrences on the bus. Complete List of Device Class decodes
Find The Issues Fast
The LeCroy Voyager software provides many mechanisms to measure and report on USB 2.0 and 3.0 traffic. With the Traffic Summary display, users can evaluate statistical reports at a glance or navigate to individual events. Users may select transaction packets to view ACK/NAK or Device Notification events, then jump to each occurrence with a single keystroke. Reports are available showing link throughput and flow control metrics. Higher level events are also tracked and reported at the logical USB Transfer level. The error report shows a range of protocol violations - from invalid CRCs to power state transition errors.
The Bus Utilization graphs show data and packet length, bus usage by device in a histogram format. The Bandwidth calculator automatically calculates the time delta between two points in the trace. Fast Search and Find options allow users to navigate to specific packets, errors and any data type within a trace file. The CATC Trace supports filter and hide commands, to temporarily remove irrelevant data from the display for more efficient viewing.
Since 1996, LeCroy has been a key provider of tools for the USB ecosystem. The LeCroy Voyager system leverages countless hours of research in high-speed serial data analysis to create the most reliable and accurate USB 3.0 analyzer system available. Combined with the exerciser option and the CATC Trace expert software, the LeCroy Voyager platform alleviates developers from tedious byte-level analysis and lets them focus on quick resolution of protocol layer problems.
Voyager M3 Slow Clock Option
The Voyager M3 USB 3.0 Analyzer can support slower than standard clock rates. This option allows users to select clock rates at fractional intervals between 5Ghz and 1Mhz. This option also enables use of external clock sources to synchronize frequency of the Voyager system.
The external clock input is 3.3 volt LVPECL and operates on the USB 3.0 differential signals only. Device setup should be AC coupled at the clock input with a 10 uF ceramic capacitor. When enabled - the slow clock option affects both the analyser (record) and the exerciser (transmit) frequencies. Voyager M3 SMA Differential Input Option
LeCroy’s Voyager M3 platform for USB 3.0 includes an optional SMA Differential Input tapping mechanism for probing SuperSpeed Links. The SMA Input can serve as an alternate interface for taping between early development boards. This eliminates dependencies on USB 3.0 connectors allowing testing to begin as soon as PHY silicon is available. This also allows test teams to remove an additional variable (prototype 3.0 connectors) from the test matrix to help isolate protocol layer issues from possible physical layer problems.
The optional SMA Differential Input can be utilized on host, device or both sides of the SuperSpeed link. It will operate with the analyzer in record mode or can be used with the exerciser additionally to allow transmit and record over this alternate cabling interface. Voyager M3 Exerciser Option
LeCroy's Voyager M3 platform for USB 3.0 includes an exerciser option that can transmit valid and invalid USB 2.0 and 3.0 packets while simultaneously capturing and decoding the real response from the device under test allowing design engineers to verify functionality, error recovery and compliance for low, full, high-speed or SuperSpeed USB devices. Users create test patterns by exporting any traffic stream from a previously recorded LeCroy USB trace. These stimulus files can be played back bit-for-bit making it easy to recreate problems reported in the field using a simple trace file.
A text-based control language can also be used to create packet level traffic files. The ability to insert code errors, or customized data payloads makes it easy to perform corner-case, feature, and limit testing. Users have the freedom to insert errors anywhere within the stream to validate fault handling. The USB 3.0 exerciser mode can operate with a link and transaction manager that automatically handles link layer logical state transitions and handshaking. This allows users to focus on message layer traffic unencumbered by SuperSpeed link timing requirements. The Exerciser option is scheduled for release in Q4 2008. Existing systems can be field-upgraded via license key and new software at any point the exerciser option is required. |
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